Solid-state imaging element, method of manufacturing the same, and imaging device

ABSTRACT

In pixels that are two-dimensionally arranged in a matrix fashion in the pixel array unit of a solid-state imaging element, a photoelectric conversion film having a light shielding film buried therein is formed and stacked on the light incident side of the photodiode. The present technique can be applied to a CMOS image sensor compatible with the global shutter system, for example.

CROSS-REFERENCE PARAGRAPH

The present application is a continuation application of U.S. patentapplication Ser. No. 15/996,730, filed Jun. 4, 2018, which is acontinuation application of U.S. patent application Ser. No. 15/426,772,filed Feb. 7, 2017, now U.S. Pat. No. 10,002,902, which is acontinuation application of U.S. patent application Ser. No. 14/891,541filed Nov. 16, 2015, now U.S. Pat. No. 9,590,003, which is a NationalPhase Patent Application of International Application No.PCT/JP2014/003291 filed Jun. 19, 2014 and which claims priority fromJapanese Patent Application No. JP 2013-134838 filed Jun. 27, 2013. Eachof the above referenced applications is hereby incorporated by referencein its entirety.

TECHNICAL FIELD

The present technique relates to solid-state imaging elements, methodsof manufacturing the solid-state imaging elements, and imaging devices,and more particularly, relates to a solid-state imaging element thatincludes a photoelectric conversion film that can have a reducedthickness, a method of manufacturing the solid-state imaging element,and an imaging device.

BACKGROUND ART

Solid-state imaging elements such as CMOS (Complementary Metal OxideSemiconductor) image sensors have been widely used in digital stillcameras and digital video cameras.

As an electron shutter system for CMOS image sensors, a global shuttersystem has been suggested (see Patent Document 1, for example).According to the global shutter system, exposure is simultaneouslystarted for all the valid pixels for imaging, and the exposure issimultaneously ended for all the valid pixels. Therefore, to temporarilystore photoelectric charges accumulated by photodiodes while readingoccurs after the end of the exposure, a memory unit needs to beprovided.

In this type of CMOS image sensor, a light shielding film having lightshielding properties needs to be formed to shield the memory unit fromlight. For example, Patent Document 2 discloses a CMOS image sensor thatincludes a light shielding film having light shielding properties.

CITATION LIST Patent Documents

Patent Document 1: JP 2011-216970 A

Patent Document 2: JP 2012-248679 A

SUMMARY OF THE INVENTION Problems to be Solved by the Invention

Where a structure in which a photoelectric conversion film that servesas a photoelectric converter and has light shielding properties isstacked on a semiconductor substrate is used as a CMOS image sensor thatuses the global shutter system, a memory unit and transistors need to beformed on the semiconductor substrate, and the photoelectric conversionfilm to be stacked on the semiconductor substrate needs to maintainlight shielding properties. To improve the light shielding properties,an increase in the thickness of the photoelectric conversion film iseffective.

However, to perform light shielding in a complete manner, a thickness of1 jam or greater is required, and a greater thickness leads to anincrease in the load on film formation and processing procedures. Agreater thickness also leads to an increase in semiconductor chip size.Therefore, with incorporation into end products being taken intoaccount, a reduction in the thickness of the photoelectric conversionfilm is desired.

Also, according to the technique disclosed in Patent Document 2, thephotoelectric conversion film is not stacked on a semiconductorsubstrate. Therefore, this technique is not suitable for a structure inwhich the photoelectric converter and the memory unit are stacked so asto reduce the semiconductor chip area.

The present technique has been developed in view of those circumstances,and aims to reduce the thickness of a photoelectric conversion film thatserves as a photoelectric converter and has light shielding propertieswhen a structure in which such a photoelectric conversion film isstacked on a semiconductor substrate is used.

Solutions to Problems

A solid-state imaging element of a first aspect of the present techniqueincludes: a photodiode; and a photoelectric conversion film stacked onthe light incident side of the photodiode, and a light shielding filmbeing buried in the photoelectric conversion film.

The solid-state imaging element further includes a memory unit thatstores charges transferred from the photodiode and is locatedimmediately below the light shielding film.

The light shielding film may be formed in accordance with the pixelsize.

The photoelectric conversion film may be an inorganic compoundsemiconductor that can be epitaxially grown.

The photoelectric conversion film may be a CIGS (Copper Indium GalliumDiSelenide) thin film.

In the solid-state imaging element of the first aspect of the presenttechnique, a photoelectric conversion film having a light shielding filmburied therein is stacked on the light incident side of a photodiode.

A manufacturing method of a second aspect of the present techniqueincludes the steps of: forming a photodiode on a semiconductorsubstrate; and forming a photoelectric conversion film on the lightincident side of the semiconductor substrate, and a light shielding filmburied in the photoelectric conversion film.

In the manufacturing method of the second aspect of the presenttechnique, a photodiode is formed on a semiconductor substrate, and aphotoelectric conversion film having a light shielding film buriedtherein is formed on the light incident side of the semiconductorsubstrate.

An imaging device of a third aspect of the present technique has asolid-state imaging element mounted therein, the solid-state imagingelement including: a photodiode; and a photoelectric conversion filmstacked on the light incident side of the photodiode, and a lightshielding film buried in the photoelectric conversion film.

In the imaging device of the third aspect of the present technique, asolid-state imaging element having a photoelectric conversion filmstacked on the light incident side of a photodiode is mounted, with alight shielding film being buried in the photoelectric conversion film.

Effects of the Invention

According to the first through third aspects of the present technique,the thickness of the photoelectric conversion film can be reduced.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a diagram showing an example structure of a CMOS image sensor.

FIG. 2 is a cross-sectional view of an example structure of unit pixels.

FIG. 3 is a top view of the example structure of unit pixels.

FIG. 4 is a diagram showing a process of manufacturing the unit pixels.

FIG. 5 is a diagram showing another example structure of a unit pixel.

FIG. 6 is a diagram showing another example structure of a unit pixel.

FIG. 7 is a diagram showing another example structure of a CMOS imagesensor.

FIG. 8 is a diagram showing another example structure of a CMOS imagesensor.

FIG. 9 is a diagram showing an example structure of an imaging device.

MODES FOR CARRYING OUT THE INVENTION

The following is a description of embodiments of the present technique,with reference to the drawings.

<Example Structure of a Solid-State Imaging Element>

FIG. 1 is a block diagram showing an example structure of a CMOS imagesensor as a solid-state imaging element to which the present techniqueis applied.

As shown in FIG. 1, the CMOS image sensor 100 includes a pixel arrayunit 111 and a peripheral circuit unit. The peripheral circuit unitincludes a vertical drive 112, a column processor 113, a horizontaldrive 114, and a system controller 115.

The CMOS image sensor 100 further includes a signal processor 118 and adata storage 119. The signal processor 118 and the data storage 119 maybe mounted on the substrate on which the CMOS image sensor 100 ismounted, or may be an external signal processor provided on a substratedifferent from the substrate of the CMOS image sensor 100, such as a DSP(Digital Signal Processor) or a processor formed with software.

In the pixel array unit 111, unit pixels (hereinafter sometimes alsoreferred to simply as “pixels”) including photoelectric conversionelements are two-dimensionally arranged in a matrix fashion. Thestructure of each of the unit pixels will be described later in detail.

The pixel array unit 111 further has pixel drive lines 116 formed in thehorizontal direction in the drawing for the respective rows in thematrix-like pixel arrangement, and has vertical signal lines 117 formedfor the respective columns in the vertical direction in the drawing. Oneend of each of the pixel drive lines 116 is connected to the output endcorresponding to the respective rows of the vertical drive 112.

The vertical drive 112 is a pixel drive unit that is formed with a shiftregister, an address decoder, and the like, and drives the respectivepixels of the pixel array unit 111 all at once or row by row.

Signals that are output from the respective unit pixels of a pixel rowselected and scanned by the vertical drive 112 are supplied to thecolumn processor 113 through the respective vertical signal lines 117.For the respective pixel columns of the pixel array unit 111, the columnprocessor 113 performs predetermined signal processing on the signalsthat are output from the respective unit pixels of the selected rowthrough the vertical signal lines 117, and temporarily stores the pixelsignals subjected to the signal processing.

Specifically, the column processor 113 performs a noise removal processsuch as a CDS (Correlated Double Sampling) process as the signalprocessing. Through the CDS process performed by the column processor113, fixed pattern noise unique to the pixels, such as reset noise orvariations in the threshold value of the amplification transistor, isremoved. Other than performing the noise removal process, the columnprocessor 113 can have an A-D (Analog-Digital) conversion function, forexample, and output a signal level in the form of a digital signal.

The horizontal drive 114 is formed with a shift register, an addressdecoder, and the like, and sequentially selects the unit circuitscorresponding to the pixel columns of the column processor 113. As thehorizontal drive 114 performs selecting and scanning, the pixel signalssubjected to the signal processing by the column processor 113 aresequentially output.

The system controller 115 is formed with a timing generator thatgenerates various kinds of timing signals and the like, and controlsdriving of the vertical drive 112, the column processor 113, thehorizontal drive 114, the data storage 119, and the like based on thevarious kinds of timing signals generated by the timing generator.

The signal processor 118 has at least an adding process function, andperforms various kinds of signal processing such as an adding process onpixel signals that are output from the column processor 113. At the timeof the signal processing performed by the signal processor 118, the datastorage 119 temporarily stores the necessary data for the signalprocessing.

<Structures of Unit Pixels>

Referring now to FIG. 2, the structures of the unit pixels 120 arrangedin a matrix fashion in the pixel array unit 111 shown in FIG. 1 isdescribed in detail.

FIG. 2 shows a cross-section of portions in the vicinities of unitpixels 120-1 and 120-2 adjacent to each other among the unit pixels 120arranged in a matrix fashion. It should be noted that, in the followingdescription, the unit pixel 120-1 and the unit pixel 120-2 will bereferred to simply as the unit pixels 120 when there is no need todistinguish those unit pixels from each other.

The unit pixels 120 are formed by stacking an OCL (On Chip Lens) layer121, a photoelectric conversion layer 122, and a semiconductor substrate123 in this order from the top of the drawing.

In the OCL layer 121, small lenses 131 and color filters 132 arearranged for the respective unit pixels 120. In FIG. 2, a lens 131-1 anda color filter 132-1 for the unit pixel 120-1, and a lens 131-2 and acolor filter 132-2 for the unit pixel 120-2 are shown.

In the photoelectric conversion layer 122, a photoelectric conversionfilm 141 is formed. In the photoelectric conversion film 141, a CIGS(Copper Indium Gallium DiSelenide) compound such as CuInGaS2 is used asa film material. Here, a film seed having higher light absorptivity thansilicon (Si) is used as the photoelectric conversion film 141, so thatthe thickness can be made smaller than that in a case where silicon isused.

As the film seed of the photoelectric conversion film 141, a compoundsemiconductor other than the above mentioned CuInGaS2 may be used, aslong as it is an inorganic compound semiconductor that can beepitaxially grown.

Other than CuInGaS, CuInGaSe, and AgInGaSe2, it is possible to use acompound semiconductor formed with more than one element, such asgallium arsenide (GaAs), indium phosphide (InP), iron disulfide (FeS2),copper sulfide (Cu2S), tin sulfide (SnS2), barium silicide (BaSi2),gallium phosphide (GaP), or indium gallium phosphorus (InGaP).

As shown in FIG. 2, light shielding films 142-1 through 142-3 are buriedin the photoelectric conversion film 141. In the light shielding films142-1 through 142-3, tungsten (W) is used as the film material. Thewidth of each opening formed between the light shielding films 142-1 and142-2 and between the light shielding films 142-2 and 142-3 depends onthe size of the unit pixels 120.

A negative potential is applied to the light shielding films 142-1through 142-3, so that the p-type regions of the photoelectricconversion film 141 located on and under the edges of the respectiveopenings are linked. Since the photoelectric conversion film 141 is ofthe p-type, depletion layers 143-1 and 143-2 are formed in the centerregions of the respective openings when a negative potential is appliedto the light shielding films 142-1 through 142-3. A planarizing film 144is formed on the side on which light enters the photoelectric conversionlayer 122.

In the description below, the light shielding films 142-1 through 142-3will be referred to simply as the light shielding films 142 when thereis no particular need to distinguish those films from one another.

The semiconductor substrate 123 is a light receiving layer that receivesincident light emitted onto the CMOS image sensor 100, and has a p-typesilicon layer (hereinafter referred to as the “p-type well layer (PWL)”)161 in which photodiodes are arranged for the respective unit pixels120, for example.

The unit pixel 120-1 includes a photodiode (PD) 151-1. The photodiode151-1 is a buried photodiode that is formed by forming a p-type layer onthe substrate surface of the p-type well layer 161 formed on an n-typesubstrate and burying an n-type buried layer, for example.

The unit pixel 120-1 includes a memory unit (MEM) 152-1 and a floatingdiffusion region (FD) 153-1, as well as the photodiode 151-1.

The memory unit 152-1 is formed with an n-type buried channel havingsuch an impurity density that a depletion state is formed at the time ofdischarging, and holds charges transferred from the photodiode 151-1.Also, located immediately below the light shielding film 142-2, as shownin FIG. 2, the memory unit 152-1 is shielded from light by the lightshielding film 142-2.

The floating diffusion region 153-1 is a charge-voltage converter formedwith an n-type layer having an impurity density, and converts chargestransferred from the memory unit 152-1 into a voltage.

The unit pixel 120-2 includes a photodiode (PD) 151-2, a memory unit(MEM) 152-2, and a floating diffusion region (FD) 153-2. The structureof the unit pixel 120-2 is the same as the above described structure ofthe unit pixel 120-1, and therefore, explanation of it is not repeatedherein. Located immediately below the light shielding film 142-3, thememory unit 152-2 is shielded from light by the light shielding film142-3.

FIG. 3 is a top view corresponding to the cross-sectional view of theunit pixels 120 in FIG. 2. In FIG. 3, however, one square is equivalentto one unit pixel 120, and four adjacent unit pixels 120-1 through 120-4are shown, for ease of explanation.

As shown in FIG. 3, in the unit pixel 120-1, the portions other than anopening 171-1 that guides light into the photodiode 151-1 and part ofthe photoelectric conversion film 141 are shielded from light by thelight shielding film 142 buried in the photoelectric conversion film141. That is, the memory unit 152-1 located at the upper right corner ofthe unit pixel 120-1 is located immediately below the light shieldingfilm 142 and is shielded from light.

In the unit pixels 120-2 through 120-4, the memory units 152-2 through152-4 are shielded from light by the light shielding films 142 buried inthe photoelectric conversion film 141, as in the unit pixel 120-1.

In the example case shown in FIG. 3, the memory units 152-1 through152-4 are located near the center position among the four unit pixels120-1 through 120-4 and immediately below the light shielding films 142.However, the arrangement of the memory units 152 is not limited to that,and the memory units 152 may be located in other positions, as long asthey are immediately below the light shielding films 142.

Two adjacent unit pixels 120 have been described with reference to FIG.2, and four adjacent unit pixels 120 have been described with referenceto FIG. 3. However, the other unit pixels 120 arranged in a matrixfashion in the pixel array unit 111 shown in FIG. 1 each have the samestructure as above.

In the pixel array unit 111 shown in FIG. 1, one pixel is formed with aphotodiode 151 and pixel transistors, and pixels are arranged in amatrix fashion. The pixel transistors are elements that transfer chargesfrom the photodiode 151, and read the charges as signals. The pixeltransistors are formed with transfer transistors, a reset transistor, anamplification transistor, and a select transistor, for example.

The transfer transistors are formed with a first transfer transistorthat transfers charges accumulated in the photodiode 151 to the memoryunit 152, and a second transistor that transfers the charges stored inthe memory unit 152 to the floating diffusion region 153, for example.As shown in FIG. 2, first transfer transistors 162-1 and 162-2 areformed as vertical structures that extend in the depth direction fromthe surface of the semiconductor substrate 123.

The reset transistor is connected between a power supply Vrst and thefloating diffusion region 153, and resets the floating diffusion region153 when a control pulse is applied to the gate electrode thereof. Theamplification transistor has its drain electrode connected to a powersupply Vdd, and has its gate electrode connected to the floatingdiffusion region 153. The select transistor has its drain electrodeconnected to the source electrode of the amplification transistor, andhas its source electrode connected to the corresponding vertical signalline 117.

When a control pulse is applied to the gate electrode of the selecttransistor, the select transistor selects the unit pixel 120 from whicha signal is to be read. When the select transistor selects the unitpixel 120 from which a pixel signal is to be read, the amplificationtransistor reads and amplifies the pixel signal indicating the voltageof the floating diffusion region 153, and outputs the pixel signal fromits source electrode. The select transistor supplies the pixel signalfrom the amplification transistor to the column processor 113 via thecorresponding vertical signal line 117.

The CMOS image sensor 100 including the unit pixels 120 having the abovedescribed structure starts exposing all the pixels at once, finishesexposing all the pixels at once, and transfers the charges accumulatedin the photodiodes 151 to the memory units 152 shielded from light. Inthis manner, a global shuttering operation (global exposure) isrealized. Through this global shuttering operation, imaging withoutdistortion can be performed, with the exposure time being the same forall the pixels.

<Process of Manufacturing the Unit Pixels>

Referring now to FIG. 4, a process of manufacturing the unit pixels 120is described. FIG. 4 includes cross-sectional views showing an exampleof a process of manufacturing the unit pixels 120. In FIG. 4, timeelapses in the direction from the top toward the bottom of the drawing.In the manufacturing process shown in FIG. 4, CIGS is used as thephotoelectric conversion film 141, and tungsten (W) is used as the lightshielding films 142.

First, the p-type well layer 161 that is a p-type silicon layer isformed, and a CIGS film is then formed on the entire surface of thesilicon layer (Si) by epitaxially growing or sputtering CIGS, forexample (S11). An insulating film is further formed on the entiresurface of the CIGS film (S12).

Sputtering or the like is then performed to form a tungsten (W) film onthe insulating film formed on the entire surface of the CIGS film (S13).Patterning or the like is performed to remove unnecessary portions ofthe tungsten (W) film (S14). An insulating film is also formed toprotect the sidewalls of the tungsten (W) film (S15).

Edging or the like is then performed to remove unnecessary portions ofthe insulating film and expose the CIGS (S16). The exposed CIGS isepitaxially grown (S17).

In the region where the CIGS is epitaxially grown, the growth direction(the vertical or horizontal direction in the drawing) and the growthrate can be controlled depending on process conditions. The edges of theregion where the CIGS is epitaxially grown can be controlled to bealmost vertical or be tilted at an angle or be in any other form,depending on process conditions. Furthermore, when the CIGS isepitaxially grown, the growth is stopped before the CIGS reaches theadjacent pixels, so that pixel separation can be performed.

Through the above described manufacturing process, the unit pixels 120shown in FIG. 2 can be manufactured. In the unit pixels 120 manufacturedin this manner, the photoelectric conversion film 141 (such as a CIGSfilm) having higher light absorptivity than silicon (Si) is used, andthe light shielding films 142 are formed (inserted) in the photoelectricconversion film 141, so that the thickness of the photoelectricconversion film 141 can be made smaller. The width of the openings ofthe unit pixels 120 can be changed to any size depending on the pixelsize.

<Other Structures of the Unit Pixels>

The unit pixels 120 can have a structure that is different from thestructure shown in FIG. 2. Referring now to FIGS. 5 and 6, otherstructures of the unit pixels 120 are described.

FIG. 5 is a diagram showing a structure of the unit pixel 120 in whichthe photodiode layer and the pixel transistor layer are separated fromeach other.

In the structure of the unit pixel 120 shown in FIG. 5, the p-type welllayer 161 that is a p-type silicon layer is formed, and silicon (Si) isthen epitaxially grown, to form the photodiode 151. The silicon isfurther grown, to form the transfer transistors 162. As a result, thelayer of the photodiode 151 and the layer of the transfer transistors162 can be separated from each other. Through the manufacturing processshown in FIG. 4, the photoelectric conversion film 141 is then formed,and the light shielding film 142 is further formed in the photoelectricconversion film 141.

In a case where the structure shown in FIG. 5 is used, CIGS or the likehaving a higher photoelectric conversion rate than silicon (Si) is usedas the photoelectric conversion film 141, and the light shielding film142 is buried in the photoelectric conversion film 141. In this manner,the thickness of the photoelectric conversion film 141 can be madesmaller, and the memory unit 152 can be located immediately below thelight shielding film 142.

FIG. 6 is a diagram showing a unit pixel 120 that includes more lightshielding films.

In the structure shown in FIG. 6, the photoelectric conversion film 141and the light shielding film 142 are formed by the manufacturing processshown in FIG. 4, and a CVD insulating film 145 is then formed. Lightshielding films 146-1 through 146-3 are buried at predeterminedintervals in the CVD insulating film 145. The planarizing film 144 isformed on the CVD insulating film 145.

In a case where the structure shown in FIG. 6 is used, CIGS or the likehaving a higher photoelectric conversion rate than silicon (Si) is alsoused as the photoelectric conversion film 141, and the light shieldingfilm 142 is buried in the photoelectric conversion film 141.Accordingly, the thickness of the photoelectric conversion film 141 canbe made smaller, and the memory unit 152 can be located immediatelybelow the light shielding film 142.

Further, the structure shown in FIG. 5 and the structure shown in FIG. 6may be combined, so that the CVD insulating film 145 having the lightshielding films 146 buried therein is formed in the structure having thelayer of the photodiode 151 separated from the layer of the pixeltransistors.

As described above, according to the present technique, in a structurehaving the photoelectric conversion film 141 stacked on thesemiconductor substrate 123, an inorganic compound semiconductor such asCIGS having a higher photoelectric conversion rate than silicon is usedas the photoelectric conversion film 141, and the light shielding films142 are buried in the photoelectric conversion film 141, so that thethickness of the photoelectric conversion film 141 can be reduced. As aresult, the load of the film formation and the processing procedures canbe reduced, and incorporation into end products is advantageouslyfacilitated.

Also, according to the present technique, the light shielding films 142may have shapes corresponding to the openings that depend on the pixelsize, instead of invariable shapes. Accordingly, the memory units 152that store charges transferred from the photodiodes 151 can be locatedimmediately below the light shielding films 142, and be shielded fromlight. In this manner, the regions under the light shielding films 142can be effectively used. As light shielding is provided by the lightshielding films 142, pixel separation can also be realized.

<Modifications of the Structure of the Solid-State Imaging Element>

In the above description, as shown in FIG. 1, the data storage 119 andthe column processor 113 are placed in parallel with each other withrespect to the signal processor 118 in the later stage, but thestructure is not limited to that. For example, as shown in FIG. 7, thedata storage 119 and the column processor 113 may be placed in parallelwith each other, and the signal processor 118 in the later stage mayperform signal processing on data that are simultaneously read out byhorizontal scanning performed by the horizontal drive 114.

Furthermore, as shown in FIG. 8, the column processor 113 may have anA-D conversion function that performs A-D conversion on each column oreach certain number of columns of the pixel array unit 111. Also, thedata storage 119 and the signal processor 118 may be placed in parallelwith each other with respect to the column processor 113, and performrespective processes on each column or each certain number of columnsafter the signal processor 118 performs an analog or digital noiseremoval process.

The present technique is applied not only to solid-state imagingelements. Specifically, the present technique can be applied to anyelectronic devices that use solid-state imaging elements in the imagecapturing units (photoelectric converters), such as imaging devicesincluding digital still cameras and digital video cameras, mobileterminals having imaging functions, and copying machines that usesolid-state imaging elements in the image reading units. A solid-stateimaging element may be formed as one chip, or may be formed as a modulein which an imaging unit and a signal processing unit or an opticalsystem are packaged and has an imaging function.

<Example Structure of an Electronic Device to which the PresentTechnique is Applied>

FIG. 9 is a diagram showing an example structure of an imaging device asan electronic device to which the present technique is applied.

The imaging device 300 shown in FIG. 9 includes an optical unit 301formed with lenses and the like, a solid-state imaging element 302 thatincludes the unit pixels 120 having any of the above describedstructures, and a DSP (Digital Signal Processor) circuit 303 as a camerasignal processor circuit. The imaging device 300 also includes a framememory 304, a display unit 305, a recording unit 306, an operation unit307, and a power supply unit 308. The DSP circuit 303, the frame memory304, the display unit 305, the recording unit 306, the operation unit307, and the power supply unit 308 are connected to one another via abus line 309.

The optical unit 301 captures incident light (image light) from theobject, and forms an image in the imaging area of the solid-stateimaging element 302. The solid-state imaging element 302 converts thelight quantity of the incident light, which has been captured as animage in the imaging area by the optical unit 301, into an electricsignal for each pixel, and outputs the electric signal as a pixelsignal. The solid-state imaging element 302 may be a solid-state imagingelement such as the CMOS image sensor 100 according to the abovedescribed embodiment, or a solid-state imaging element that can performimaging without distortion through global exposure.

The display unit 305 is formed with a panel-type display device such asa liquid crystal panel or an organic EL (electro luminescence) panel,and displays a video image or a still image captured and formed by thesolid-state imaging element 302. The recording unit 306 records thevideo image or the still image captured by the solid-state imagingelement 302 on a recording medium such as a video tape, a DVD (DigitalVersatile Disk), or a flash memory.

In accordance with operations by the user, the operation unit 307 issuesoperation commands with respect to the various functions of the imagingdevice 300. The power supply unit 308 serves as various kinds of powersupplies for the DSP circuit 303, the frame memory 304, the display unit305, the recording unit 306, and the operation unit 307, and suppliespower to those components where appropriate.

Where the CMOS image sensor 100 according to the above describedembodiment is used as the solid-state imaging element 302, a process ofreducing noise including kTC noise can be performed, and accordingly, ahigh S/N ratio can be secured. Thus, the quality of captured images canbe improved by the imaging devices 300 not only of digital still camerasand digital video cameras but also of camera modules for mobile devicessuch as portable telephone devices.

The above described embodiment is applied to a CMOS image sensor inwhich unit pixels that sense signal charges as a physical quantitycorresponding to the light quantity of visible light are arranged in amatrix fashion. However, the present technique is not necessarilyapplied to a CMOS image sensor, and may be applied to any column-typesolid-state imaging element in which column processors are provided forthe respective pixel columns of the pixel array unit.

Also, the present technique is not necessarily applied to a solid-stateimaging element that senses a distribution of the incident lightquantity of visible light and forms an image in accordance with thedistribution, but may also be applied to a solid-state imaging elementthat captures a distribution of an influx of infrared rays, X-rays,particles or the like as an image, or, in a broader sense, to anysolid-state imaging element (any physical quantity distribution sensor)such as a finger print sensor that senses a distribution of a physicalquantity such as pressure or electrostatic capacitance and captures thedistribution as an image.

It should be noted that embodiments of the present technique are notlimited to the above described embodiments, and various modificationsmay be made to them without departing from the scope of the presenttechnique.

The present technique can also be embodied in the following structures.

(1) A solid-state imaging element including: a photodiode; and aphotoelectric conversion film stacked on a light incident side of thephotodiode, a light shielding film being buried in the photoelectricconversion film.

(2) The solid-state imaging element of (1), further including a memoryunit that stores charges transferred from the photodiode, and is locatedimmediately below the light shielding film.

(3) The solid-state imaging element of (1) or (2), wherein the lightshielding film is formed in accordance with a pixel size.

(4) The solid-state imaging element of (1), wherein the photoelectricconversion film is an inorganic compound semiconductor that can beepitaxially grown.

(5) The solid-state imaging element of (4), wherein the photoelectricconversion film is a CIGS (Copper Indium Gallium DiSelenide) thin film.

(6) A solid-state imaging element manufacturing method including thesteps of: forming a photodiode on a semiconductor substrate; and forminga photoelectric conversion film on a light incident side of thesemiconductor substrate, a light shielding film being buried in thephotoelectric conversion film.

(7) An imaging device including a solid-state imaging element mountedtherein, the solid-state imaging element including: a photodiode; and aphotoelectric conversion film stacked on a light incident side of thephotodiode, a light shielding film being buried in the photoelectricconversion film.

REFERENCE SIGNS LIST

-   100 CMOS image sensor-   111 Pixel array unit-   120, 120-1 to 120-4 Unit pixels-   121 OCL layer-   122 Photoelectric conversion layer-   123 Semiconductor substrate-   141 Photoelectric conversion film-   142, 142-1 to 142-3 Light shielding films-   151, 151-1 to 151-4 photodiodes-   152, 152-1 to 152-4 Memory units-   153, 153-1, 153-2 Floating diffusion regions-   300 Imaging device-   302 Solid-state imaging element

What is claimed is:
 1. A solid-state imaging element, comprising: aphotodiode; a photoelectric conversion film stacked on a light incidentside of the photodiode; and a light shielding film at least partiallyburied within the photoelectric conversion film.